22.09.24 | Vollzeit | Düsseldorf | Ericsson DeutschlandPropose improvements on People and other processes and tools- Manage invoicing/ manual payments, including follow-up and escalation resolution- Maintain day to day cooperation & contact with external parties- Prepare SOX (payroll) controls as needed- Facilitate and perform data audits as needed
Später ansehen22.09.24 | Vollzeit | Düsseldorf | Ericsson DeutschlandOf microarchitectures using System Verilog, C+, MATLAB RTL design, synthesis, RTL and gate level simulation using the latest EDA tools from Synopsys and Cadence. Design constraining and design optimization including STA and timing closure in cooperation with our back-end experts. Influence and advanced our design
Später ansehen22.09.24 | Vollzeit | Düsseldorf | Ericsson DeutschlandOf microarchitectures using System Verilog, C+, MATLAB RTL design, synthesis, RTL and gate level simulation using the latest EDA tools from Synopsys and Cadence. Design constraining and design optimization including STA and timing closure in cooperation with our back-end experts. Influence and advanced our design
Später ansehen22.09.24 | Vollzeit | Düsseldorf | Ericsson DeutschlandModelling - Propose improvements on People and other processes and tools - Manage invoicing/ manual payments, including follow-up and escalation resolution - Maintain day to day cooperation & contact with external parties - Prepare SOX (payroll) controls as needed - Facilitate and perform data audits
Später ansehen22.09.24 | Vollzeit | Düsseldorf | Ericsson DeutschlandOf microarchitectures using System Verilog, C+, MATLAB RTL design, synthesis, RTL and gate level simulation using the latest EDA tools from Synopsys and Cadence. Design constraining and design optimization including STA and timing closure in cooperation with our back-end experts. Influence and advanced our design
Später ansehen22.09.24 | Vollzeit | Düsseldorf | Ericsson DeutschlandOf microarchitectures using System Verilog, C+, MATLAB RTL design, synthesis, RTL and gate level simulation using the latest EDA tools from Synopsys and Cadence. Design constraining and design optimization including STA and timing closure in cooperation with our back-end experts. Influence and advanced our design
Später ansehen22.09.24 | Vollzeit | Düsseldorf | Ericsson DeutschlandOf microarchitectures using System Verilog, C+, MATLAB RTL design, synthesis, RTL and gate level simulation using the latest EDA tools from Synopsys and Cadence. Design constraining and design optimization including STA and timing closure in cooperation with our back-end experts. Influence and advanced our design
Später ansehen22.09.24 | Vollzeit | Düsseldorf | Ericsson DeutschlandOf microarchitectures using System Verilog, C+, MATLAB - RTL design, synthesis, RTL and gate level simulation using the latest EDA tools from Synopsys and Cadence - Design constraining and design optimization including STA and timing closure in cooperation with our back-end experts - Influence and advanced our design
Später ansehen21.09.24 | Vollzeit | Düsseldorf | Mitsubishi Chemical GroupOfficer (GVP-related), and to communicate scientific and clinical information. You will cooperate cross functionally with clinical research, marketing and sales, market access, pharmacovigilance, regulatory affairs, as well as other departments within the organization, providing medical clinical advice
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